Clock Latency

Clock Latency contain following two parts:

  • Network Latency: net delay from clock port to flip-flop clock pin in the design.
  • Source Latency:   delay from clock source to design clock port.

Clock Latency contain following two parts:

  • Network Latency: net delay from clock port to flip-flop clock pin in the design.
  • Source Latency:   delay from clock source to design clock port.

See pic for detail information for clock latency:

Clock Latency

Ideal Clock has zero latency

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